Attachment # 00005604 - LabPart2_instructions.docx

LabPart2_instructions.docx (69.88 KB)
Raw Preview of Attachment:
(refer to the detailed question and attachment below)
ECET330 Lab 1 Part 2 ProceduresTitle: Introduction to Assembly and Machine LanguageI. OBJECTIVESTo become familiar with the CPU functionUnderstanding machine languageUnderstanding assembly languageII. PARTS LISTEquipment: IBM PC or compatible with Windows 2000 or higherINTRODUCTIONThe Central Processing Unit (CPU) executes each instruction of a program one at a time. Each instruction has an operation field which describes the operation such as add or subtract that should be performed on the data. The CPU’s hardware is designed to realize binary codes. Machine language: The binary language in which instructions are binary codes and the machine (CPU) understands them.In the simple CPU design of Lecture 1, a set of operations is defined and a binary code was assigned to each operation. The following table shows the table defined in Lecture 1.Operation OP_Code Symbol Add 000 ADD Subtract 001 SUB NAND 010 NND NOR 011 NOR LOAD 100 LOD STORE 101 STR JUMP 110 JMP HALT 111 HLT Table 1 Operations, Op_Code, and Symbols for the Simple CPUIn the above table, a three-letter symbol is also defined for each operation. Writing a program using these symbols would be easier since remembering the symbols is easier than remembering the codes.Assembly language: A language in which each instruction of the program uses symbols rather than binary code.Also, the instruction format for the simple CPU was designed as follows.          The format shows that each instruction consists of three bits of Op_Code and five bits of address. For example, if the first three bits of an instruction is 000, the simple CPU hardware is designed to recognize it as the add operation (refer to the table above). Since only one format of an instruction is defined, there will be eight instructions for this CPU. One instruction would be associated with one operation. Instruction Set: The set of all instructions that a CPU realizes is called the instruction set of that CPU. PROCEDUREWatch the animation at the end of Lecture 1. The machine language of a program that adds two numbers is given in that animation. Explain the cycles that the CPU goes through in that animation.Given the diagram shown in the animation, assume that there are five numbers stored in Memory Locations 20-24. Write the code to add these numbers and store the result in Location 25.Write the machine language program (binary code).Write the assembly language program. The following problems use a different instruction format than the one used in the animation of Lecture 1. Use the following instruction format for this problem.There are three numbers stored in Memory Locations 10-12. Write a machine language program to load each number in the accumulator one at a time. Use the immediate addressing mode to add four to each value that is loaded to accumulator. Store the results in Locations 13-15. Let’s assume that in Locations 10-12 we have the values 5, 6, and 7. After executing your code, the values in Locations 13-15 should be 9, 10, and 11.Write the assembly language program.Write the machine language.Use the following instruction format only for Problem 3. When the value of the green bit is zero, the four bit to the right (red bits) is the address of the operand.1405890952500002114550485140Address00Address125730073342500219075847725Op_Code00Op_Code5181601276350022288504762500139065076200001952625-3175When this bit = 0, the red bits are the address. This is called direct addressing mode.00When this bit = 0, the red bits are the address. This is called direct addressing mode.When the green bit is one, the four bits to the right (the red bits) are the actual data.1405890952510012114550485140 Data00 Data125730073342500219075847725Op_Code00Op_Code5181601276350022288504762500139065076200001952625172085When this bit = 1, the red bits are the actual data.This is called immediate addressing mode.00When this bit = 1, the red bits are the actual data.This is called immediate addressing mode.Example of this instruction format:The binary code 00001100 means add Accumulator A with the value in address 1100. Let’s assume that we have the value 5 in Location 1100. The CPU will get the content in address 1100 (which is value 5) and add 5 to Accumulator A. Let’s say that the original value of A is 8. After the execution of this operation, it becomes 13.What does the binary code 00011100 mean? Since the green bit is 1, it means that the last four bits is not the address, but the actual data. Therefore, the CPU will add Accumulator A with the value 1100. Now, if the original value of A is 8, after this operation, it becomes 20.Now that we have two ways of specifying where the operand resides, we have two different ways to address where the data is located. One way is to provide the data immediately after the operation. The other is to provide the address of the data. Therefore, we have two different ways, or two different modes, of specifying where the operand resides.In our assembly language of simple CPU, let’s use the symbol # to distinguish between the two types of addressing modes. Now we have two types of instructions for the ADD operation. These instructions are:ADD12 means the accumulator will be added to the content of location 12. Its machine code is 00001100; andADD #12 means the accumulator will be added to 12. Its machine code is 00011100.Let’s call the first instruction direct addressing mode. Let’s call the second addressing mode immediate addressing mode.

Question

Offered Price $80.00

Homework / Lab

Question # 00066641
Subject: Computer Science
Due on: 05/10/2015
Posted On: 05/04/2015 09:44 PM

Rating:
4.1/5
Expert tutors with experiences and qualities
Posted By
Best Tutors for school students, college students
Questions:
10
Tutorials:
0
Feedback Score:

Purchase it
Report this Question as Inappropriate
Question
Please complete the following attachments
Attachments

Tags homework attachments following complete

Tutorials for this Question

Available for
$90.00

ECET330 lab part 1 and 2 and homework

Tutorial # 00062899
Posted On: 05/06/2015 11:20 PM
Posted By:
Best Tutors for school students, college students vikas
Expert tutors with experiences and qualities
Questions:
4728
Tutorials:
4985
Feedback Score:
Report this Tutorial as Inappropriate
Tutorial Preview …part x and…
Attachments
ECET330_W1_iLabPart1_and_2.docx (53.13 KB)
Preview: be xxxxxx on xxx address bus xx retrieve the xxxx instruction xxxx xxx data xx this address xx fetched and xxxxxxx in xxx xxxxxxx Unit xxxxxx happens to xx add the xxxx on xxxxxxx xxxx it xxxx read the xxxx in address xx The xxxx xx address xxx as well xx the data xx register x xxxx then xxx transferred to xxx ALU to xx added xxx xxxxxx is xxxx placed in xxxxxxxx A The xx will xxxx xxxxxxxxx and xxxx the next xxxxxxxxxxxx which is xx store xxx xxx The xxx will be xxxxxx on the xxxx bus xxx xxx specified xxxxxxx will be xxxxxx on the xxxxxxx bus xx xxxx the xxxx will be xxxxxx (once the xxxxx signal xx xxxxxxx 00The xxx will get xxx instruction of xxx address xxxxx xx the xxxxxxx Counter (which xx this case, xx the xxxxxxxx xx the xxxxx number) The xxxx of this xxxxxxx is xxxx xxxxxxxxxxx to xxx IR register xxx CPU will xxxx decode xxx xxxx on xxx IR register xxxxxxxxxxx them and xxxxxxx them xx xxx OPR xxx ADDR register), xxxxx turns out xx be xxxx xxx data xx a certain xxxxxxx (address 20) xxx Control xxxx xxxx make xxx PC increment, xxx place 20 xx the xxxxxxx xxxx A xxxx signal is xxxx issued to xxx memory, xxxxx xxxx place xxx data on xxxxxxx 20 on xxx data xxxx xx be xxxxxxxxxxx.....
Micro_Homework_1_(1).docx (13.64 KB)
Preview: and xxxxxx in x nonvolatile memory xx that they xxxxxx available xx xxx microprocessor xx fetch and xxxxxxx 4 Find xxx organization xxx xxxxxxxx of xxxxxx chips with xxx following pins xxx EEPROM        xxxxxxx xxxxxxx SRAM        xxxxxxx D0-D7I Organization: xxx x 8 x 25 x xxx x x = 32k x 8 The xxxxxxxx is xxxx xxxx II xxxxxxxxxxxxx 213 x x = 23 x 210 x x.....
Purchase this Tutorial @ $90.00 *
* - Additional Paypal / Transaction Handling Fee (3.9% of Tutorial price + $0.30) applicable
Available for
$3.00

ECET330 Micro Homework 1

Tutorial # 00063163
Posted On: 05/08/2015 03:34 AM
Posted By:
Best Tutors for school students, college students Phelly
Expert tutors with experiences and qualities
Questions:
3
Tutorials:
116
Feedback Score:
Report this Tutorial as Inappropriate
Tutorial Preview …Find xxx organization xxx capacity of xxxxxx chips with xxx following xxxx x EEPROM xxxxxxx D0-D7: D0 xx D7 is xx 8 xxx xxxxx A0 xx A14 means xx has 15bit xxxxxxxxxx making xx xxx Hence xx will be x bit, 32K xxxx chip, xxxxxxx xxxxx as xxxxxxx chips II xxxx A0-A12, D0-D7 xxxxx 64k x x = xxx kilobits 5 xxxxxx the following: x How xxxx xxxxx are xx bits? = xxxxxx II …
Attachments
Micro_Homework_1.doc (26 KB)
Preview: 1024kbytesIII xxx many xxxxxxxxx is one xxxxxxxx 1024mbytes 6 xx a xxxxx xxxxxxxxxxxxxxxx computer, xxxxxx Locations 10000H xx 9FFFFH are xxxxxxxxx for xxxx xxxxxxxx The xxxxx location is xxxxxx and the xxxx location xx xxxxxx Calculate xxx following I xxx total number xx bytes xxxxxxxxx xxx decimal) xxxxxx - 10000) x 90000 (hexadecimal) xxxxxx (decimal) xx xxx total xxxxxx of kilobytes xxx decimal) 1 xx 1024 xxxxxx xxxx available xx 576 KB x What are xxx.....
Purchase this Tutorial @ $3.00 *
* - Additional Paypal / Transaction Handling Fee (3.9% of Tutorial price + $0.30) applicable
Loading...